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nt7603 preliminary single-chip 16cx2l dot-matrix lcd controller / driver 1/25 ver 0.5 features ? internal lcd drivers 16 common signal drivers 80 segment signal drivers ? maximum display dimensions 16 characters * 2 lines or 32 characters * 1 line ? interfaces with 4-bit or 8-bit mpu ? versatile display functions provided on chip: display clear, cursor home, display on/off, cursor on/off, character blinking, cursor shift, and display shift ? three duty factors, selected by program: 1/8, 1/11, and 1/16 ? displays data ram (dd ram): 80 x 8 bits (displays up to 80 characters) ? character generator ram (cg ram): 64 x 8 bits for general data, 8 5 x 8 programmable dot patterns, or 4 5 x 10 programmable dot patterns ? low voltage reset ? ito option for a-type and b-type lcd waveform ? character generator rom (cg rom): 2 kinds of cg rom sizes: 192 characters: 160 5 x 8 dot patterns 32 5 x 10 dot patterns 240 characters: 192 5 x 8 dot patterns 48 5 x 10 dot patterns custom cg rom is also available ? built-in power-on reset function ? logic power supply: single +5v supply ? lcd driver power supply: v1~v5 (v dd +0.3 - v dd -7.0) , divided by built-in lcd power division resister. ? two oscillator operations (freq. = 500khz - 540khz): built-in rc oscillation external clock ? cmos process ? available in cog form general description the nt7603 is a dot matrix lcd controller and driver lsi that can operate with either a 4-bit or an 8-bit microprocessor (mpu). nt7603 receives control character codes from the mpu, stores them in an internal ram (up to 80 characters), transforms each character code into a 5 x 7, 5 x 8, or 5 x 10 dot matrix character pattern, and then displays the codes on the lcd panel. the built-in character generator rom consists of 256 different character patterns. the nt7603 also contains character generator ram where the user can store 8 different character patterns at run time. these memory features make character display flexible. nt7603 also provides many display instructions to achieve versatile lcd display functions. the nt7603 is fabricated on a single lsi chip using the cmos process, resulting in very low power requirements.
nt7603 2/25 ver 0.5 pad configuration 1 66 67 83 84 150 149 166 size item pad no. xy unit chip size - 5156 1349 pad pitch 1 C 166 70 m m
nt7603 3/25 ver 0.5 block diagram i/o buffer v1 v2 v3 v4 v5 rs r/w e db7~db4 db3~db0 4 4 instruction register (ir) 8 instruction decode 8 address counter vdd gnd osc1 osc2 timing generator data register (dr) busy flag (bf) 8 7 7 dharacter generator ram (cg ram) 64x8 bits cursor address counter display data ram (dd ram) 80x8 bits 16-bit shift register common signal driver 7 cursor /blink controller 7 7 7 lcd driver voltage generator 16 8 8 character generator rom (cg rom) 8 16 com1 i com16 80-bit latch circuit segment signal driver 80 80 seg1 i seg80 paraller - to - serial converter 5 5 testm 7 opt_r0 opt_r1 opt_lcd test testd
nt7603 4/25 ver 0.5 pad description ( total 166 pads for cog type.) pad no. designation i/o external connection description 1 C 15 gnd p power supply gnd: 0v 16 osc1 i for external clock operation, clock inputs to osc1. 17 osc2 o clock output. 18 v1 p power supply power supply for lcd driver. vdd 3 v1 3 v2 3 v3 3 v4 3 v5 3 gnd 19 v2 p power supply power supply for lcd driver 20 v3 p power supply power supply for lcd driver 21 v4 p power supply power supply for lcd driver 22 C 25 v5 p power supply power supply for lcd driver 26, 28 opt_r0, opt_r1 i ito option the built-in bias resister select: opt_r1, opt_r0: no ito=1. ito on=0 1,1: 2.2k ; 1,0: 4k ; 0,1: 6.8k ? 0,0:no built-in bias resister: 29 C 43 vdd p power supply v dd : +5v 44, 45 rs i mpu register select signal 0: instruction register (write), busy flag, address counter (read) 1: data register (write, read) 46, 47 r/w i mpu read/write control signal 0: write 1: read 48, 49 e i mpu read/write start signal 50, 51 db0 52, 53 db1 54, 55 db2 56, 57 db3 i/o mpu lower 4 tri-state bi-directional data bus for transmitting data between mpu and nt7603. not used during 4-bit operation. 58, 59 db4 60, 61 db5 62, 63 db6 64, 65 db7 i/o mpu higher 4 tri-state bi-directional data bus for transmitting data between mpu and nt7603. db7 is also used as busy flag. 66 opt_lcd i ito option no ito. (option =1): b-type waveform ito on. (option =0): a-type waveform 68 testd o test output test data output. ( no connect for user) 164 C 157 com1 C 8 o lcd panel 69 C 76, com9 C 16 o lcd panel common signal output pins, for place on the upper glass (ic face up). 156 C 77 seg1 C 80 o lcd panel segment signal output pins 165 test i test pin test pin internally pull-down. ( no connect for user) 166 testm o test output lcd driver clock output. ( no connect for user) 67, 27 gnd_out p gnd output pin, use for pull-down ito option.
nt7603 5/25 ver 0.5 functional d escription the nt7603 is dot-matrix lcd controller and driver lsi. it operates with either a 4-bit or an 8-bit microprocessor (mpu). the nt7603 receives both instructions and data from the mpu. some instructions set operation modes, such as the function mode, data entry mode, and display mode; as well as some control lcd display functions, such as clear display, restore display, shift display, and cursor. other instructions include read and write both data and addresses. all instructions allow users convenient and powerful functions to control the lcd dot-matrix displays. data is written into and read from the data display ram (dd ram) or the character generator ram (cg ram). as display character codes, the data stored in the dd ram decodes a set of dot-matrix character patterns that are built into the character generator rom (cg rom). the cg rom, with many character patterns (up to 256 patterns), defines the character pattern fonts. the nt7603 regularly scans the character patterns through the segment drivers. the cg ram stores character pattern fonts at run time if users intend to show character patterns that are not defined in the cg rom. this feature makes character display flexible. other unused bytes can be used as general- purpose data storage. the lcd driver circuit consists of 16 common signal drivers and 80 segment signal drivers allowing a variety of application configurations to be implemented. character generator rom (cg rom) the character generator rom generates lcd dot character patterns from the 8-bit character pattern codes. the nt7603 provides 2 cg rom configurations: 1. 192 characters: the cg rom contains 160 5 x 8 dot character patterns and 32 5 x 10 dot character patterns, which the relation between the character codes and character patterns is shown in table 1. the character codes from 00h to 0fh are used to get character patterns from the cg ram. character codes from 10h to 1fh and from 80h to 9fh map to full character patterns. character codes from e0h to ffh are assigned to generate 5 x 10 dot character patterns, and other codes are used to generate 5x8 dot character patterns. 2. 240 characters: the cg rom contains 192 5 x 8 dot character patterns and 48 5 x 10 dot character patterns, which the relation between the character codes and character patterns is shown in table 2. the character codes from 00h to 0fh are used to get character patterns from the cg ram. character codes from 10h to 1fh and from e0h to ffh are assigned to generate 5 x 10 dot character patterns, and other codes to generate 5 x 8 dot character patterns. no null character pattern exists in this type. note that the underlined cursor, displayed on the 8th duty may be obscure if the 8th row of a dot character pattern is coded. we recommend that users display the cursor in the blinking mode if they code 5x8 dot character patterns is their custom cg rom. custom character patterns are available by mask- programming rom. for convenience of character pattern development, novatek has developed a user-friendly editor program for the nt7603 to help determine the character patterns users prefer. by executing the program on the computer, users can easily create and modify their character patterns. by transferring the resulting files generated by the program through a modem or some other communication method, the user and novatek have established a reliable, fast link for programming the cg rom.
nt7603 6/25 ver 0.5 absolute maximum ratings* power supply voltage (v dd ) . . . . . . . . . . -0.3v to +7.0v power supply voltage (v 1 to v 5 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd to v dd +0.3v input voltage (v i ) . . . . . . . . . . . . . . . -0.3v to v dd +0.3v operating temperature (t opr ) . . . . . . .-20 c to +70 c storage temperature (t stg ) . . . . . . . .-55 c to +125 c *comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. ? all voltage values are referenced to gnd = 0v ? v 1 to v 5 , must maintain v dd 3 v 1 3 v 2 3 v 3 3 v 4 3 v 5 3 gnd. dc electrical characteristics (v dd = 5.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions applicable pin vdd operating voltage 4.5 5.0 5.5 v v ih1 "h" level input voltage (1) 2.2 - v dd v db0 C db7, rs, v il1 "l" level input voltage (1) -0.3 - 0.8 v r/w, e v ih2 "h" level input voltage (2) v dd -1.0 - v dd vosc1 v il2 "l" level input voltage (2) gnd - 1.0 v v oh1 "h" level output voltage (1) 2.4 - - v i oh = -0.25ma db0 - db7 v ol1 "l" level output voltage (1) - - 0.4 v i ol = 1.2ma (ttl) v com driver voltage descending (com) - - 0.3 v i d = 5 m a com1 - 16 v seg driver voltage descending (seg) - - 0.3 v i d = 5 m a seg1 - 80 i il input leakage current -1 - 1 m a v in = 0 to v dd not include osci -i p pull-up mos current 50 125 250 m a v dd = 5v rs, r/w, db0-db7 i op power supply current - 1 1.5 ma rf oscillation, from external clock v dd = 5v, f osc = f cp = 540khz, include lcd bias current. v dd
nt7603 7/25 ver 0.5 dc electrical character (continued) symbol parameter min. typ. max. unit conditions applicable pin external clock operation f cp external clock operating frequency 250 540 700 khz t duty external clock duty cycle 45 50 55 % t rcp external clock rise time 0.1 - 0.5 m s t fcp external clock fall time 0.1 - 0.5 m s internal clock operation (built-in rc oscillator) f osc oscillator frequency 380 540 700 khz rf = 50k w (reference only) v lcd1 v lcd2 lcd driving voltage 3.0 - v dd v v dd - v 5 ac characteristics read cycle (v dd = 5.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t cyce enable cycle time 500 - - ns figure 1 t whe enable "h" level pulse width 300 - - ns figure 1 t re , t fe enable rise/fall time - - 25 ns figure 1 t as rs, r/w setup time 60 1 - - ns figure 1 100 2 t ah rs, r/w address hold time 10 - - ns figure 1 t rd read data output delay - - 190 ns figure 1 t dhr read data hold time 20 - - ns figure 1
nt7603 8/25 ver 0.5 ac characteristics (continued) write cycle (v dd = 5.0v, gnd = 0v, t a = 25 c) symbol parameter min. typ. max. unit conditions t cyce enable cycle time 500 - - ns figure 2 t whe enable "h" level pulse width 300 - - ns figure 2 t re , t fe enable rise/fall time - - 25 ns figure 2 t as rs, r/w setup time 60 1 - - ns figure 2 100 2 t ah rs, r/w address hold time 10 - - ns figure 2 t ds data output delay 100 - - ns figure 2 t dhr data hold time 10 - - ns figure 2 notes: 1: 8-bit operation mode 2: 4-bit operation mode power supply conditions using internal r eset circuit symbol parameter min. typ. max. unit conditions t ron power supply rise time 0.1 - 10 ms figure 3 t off power supply off time 1 - - ms figure 3
nt7603 9/25 ver 0.5 timing waveforms read operation rs r/w e db0 ~ db7 v ih1 v il1 t re t rd v ih1 v il1 vaild data v ih1 v il1 t as v ih1 v il1 t ah t whe t fe v il1 t dhr v ih1 v il1 t cyce v il1 figure 1. bus read operation sequence (reading out data from nt7603 to mpu) write operation rs r/w e db0 ~ db7 v ih1 v il1 t re t ds v ih1 v il1 vaild data v ih1 v il1 t as v ih1 v il1 t ah t whe t fe v il1 t dhw v ih1 v il1 t cyce v il1 v il1 figure 2. bus write operation sequence (writing out data from nt7603 to mpu) interface signals with segment driver lsi v dd 0.2v t ron 4.5v 0.1ms > t ron > 10ms t off 0.2v 0.2v t off > 1ms figure 3. t off stipulates the time of power odd for instantaneous power supply to or when power supply repeats on and off.
nt7603 10/25 ver 0.5 note 1: the nt7603 has two clock options: a. internal oscillator (built-in rc) osc1 osc2 open open b. external clock operation osc1 osc2 open pulse input note 2: input/output terminals: a. input terminal applicable terminal: e (no pull up mos) pmos vdd nmos applicable terminal: rs, r/w (with pull up mos) pmos vdd nmos vdd pmos pull up mos
nt7603 11/25 ver 0.5 b. output terminal applicable terminal: testm pmos vdd nmos c. i/o terminal applicable terminal: db0 to db7 nmos vdd pmos pull up mos pmos vdd pmos vdd nmos enable data (output circuit) (tristate) note 3: ito options: set option=0: place ito on the option pad. set option=1: no ito on the option pad. gnd_out option pad option (internal pull up) option=1 no ito: option pad ito on: ito option=0 option (internal pull up) gnd output pad gnd output pad gnd_out
nt7603 12/25 ver 0.5 table 1. nt7603-01 corres pondence between character codes and character patterns (novatek standard 192 character cg rom)
nt7603 13/25 ver 0.5 table 2. example of 240 character cg rom
nt7603 14/25 ver 0.5 instruction set instruction code function execution time (max) rs rw db7 db6 db5 db4 db3 db2 db1 db0 (f osc = 250khz) display clear 0 0 0 0 0 0 0 0 0 1 clear entire display area. 1.64ms display/ cursor home 000000001* restore display from shift and load address counter with dd ram address 00h. 1.64ms entry mode set 00000001i/ds specify direction of cursor movement and display shift mode. this operation takes place after each data transfer (read/write). 40 m s display on/off 000000 1dcb specify activation of display (d) cursor (c) and blinking of character at cursor position (b). 40 m s display/ cursor shift 0 0 0 0 0 1 s/c r/l * * shift display or move cursor. 40 m s function set 00 0 0 1dln f * * set interface data length (dl), number of display line (n), and character font (f). 40 m s ram address set 00 0 1 acg load the address counter with a cg ram address. subsequent data access is for cg ram data. 40 m s dd ram address set 00 1 add load the address counter with a dd ram address. subsequent data access is for dd ram data. 40 m s busy flag/ address counter read 01 ac read busy flag (bf) and contents of address counter (ac). 40 m s cg ram/ dd ram data write 10 write data write data to cg ram or dd ram. 40 m s cg ram/ dd ram data read 1 1 read data read data from cg ram or dd ram. 40 m s i/d = 1 : increment i/d = 0 : decrement s = 1 : display shift on d = 1 : display on c = 1 : cursor display on b = 1 : cursor blink on s/c = 1 : shift display s/c = 0 : move cursor r/l = 1 : shift right r/l = 0 : shift left dl = 1 : 8-bit dl = 0 : 4-bit n = 1 : dual line n = 0 : signal line f = 1 : 5x10 dots f = 0 : 5x8 dots bf = 1 : internal operation bf = 0 : ready for instruction dd ram : display data ram cg ram : character generator ram acg : character generator ram address add : display data ram address ac : address counter note 1: symbol "*" signifies an insignificant bit (disregard). note 2: correct input value for "n" is predetermined for each model.
nt7603 15/25 ver 0.5 interface to lcd (1) character font and number of lines the nt7603 provide a 5 x 7 dot character font 1-line mode, a 5 x 10 dot character font 1-line mode and a 5 x 7 dot character font 2-line mode, as shown in the table below. three types of common signals are available as displayed in the table. the number of lines and the font type can be selected by the program. number of lines character font number of common signals duty factor bias 1 5 x 7 dots + cursor (or 5x8 dots) 81/81/4 1 5 x 10 dots + cursor 11 1/11 1/4 2 5 x 7 dots + cursor (or 5x8 dots) 16 1/16 1/5 (2) connection to lcd the following 4 lcd connection examples show the various combinations between characters and lines. nt7603 can directly drive the following combinations: (a) 5 x 8 font - 16 character x 1 line (1/8 duty cycle, 1/4 bias) nt7603 com1 com8 seg1 seg80 lcd panel
nt7603 16/25 ver 0.5 (b) 5 x 10 font - 16 character x 1 line (1/11 duty cycle, 1/4 bias) nt7603 com1 com8 seg1 seg80 lcd panel com11 com9 (c) 5 x 8 font - 16 character x 2 line (1/16 duty cycle, 1/5 bias) nt7603 com1 com8 seg1 seg80 lcd panel com16 com9
nt7603 17/25 ver 0.5 (d) 5 x 8 font - 32 character x 1 line (1/16 duty cycle, 1/5bias) nt7603 com1 com8 seg1 seg80 lcd panel com16 com9 (3) orientation type of nt7603: t y pe1: place the chip on the upper g lass(ic face up) nt7603 1 lcd panel c1,s1 c16,s80 c8,s1 c9,s80
nt7603 18/25 ver 0.5 (3) bias power connection nt7603 provides 1/4 or 1/5 bias for various duty cycle applications. the built-in power division resister divide voltage is described in the following table. the division resister is the connection of nt7603, power supply, and resistors are also shown as follows: power division 1/8, 1/11 duty cycle - 1/4 bias 1/16 duty cycle - 1/5 bias v 1 v dd - 1/4 v lcd v dd - 1/5 v lcd v 2 v dd - 1/2 v lcd v dd - 2/5 v lcd v 3 v dd - 1/2 v lcd v dd - 3/5 v lcd v 4 v dd - 3/4 v lcd v dd - 4/5 v lcd v 5 v dd - v lcd v dd - v lcd the bias is auto selected by duty cycle. when lcd is set to 1/16 duty, the bias is set to 1/5. otherwise, the bias is set to 1/ 4. the ito option can select the division resister value: opt_r1 opt_r0 division resister no ito (1) no ito (1) 2.2k no ito (1) ito on (0) 4k ito on (0) no ito (1) 6.8k ito on (0) no ito (0) no built-in resister (external input) nt7603 vdd v1 v2 v3 v4 v5 vdd vr gnd v lcd built-in bias resister 2.2k,4k or 6.8k ohm. nt7603 vdd v1 v2 v3 v4 v5 vr gnd vdd r r r r v lcd vdd v1 v2 v3 v4 v5 vr vdd r r r r r v lcd exit power division. (the resistance value depends on the lcd panel size.) gnd nt7603
nt7603 19/25 ver 0.5 (4) lcd waveform a-type, 1/8 duty cycle, 1/4 bias com1 vdd v1 v2 (v3) v4 v5 1234 5 400 clocks 812 1 frame 1 ms 9 . 11 8 400 k 270 sec 1 frame = = hz 3 . 84 ms 9 . 11 1 frequency = = frame a-type, 1/11 duty cycle, 1/4 bias com1 vdd v1 v2 (v3) v4 v5 1234 5 400 clocks 11 1 2 1 frame 1 ms 3 . 16 11 400 k 270 sec 1 frame = = hz 4 . 61 3 16 1 fre q uenc y = = frame a-type, 1/16 duty cycle, 1/5 bias com1 vdd v1 v2 v4 v5 1234 5 200 clocks 16 1 2 1 frame 1 ms 9 . 11 16 200 k 270 sec 1 frame = = hz 3 . 84 9 11 1 fre q uenc y = = frame v3
nt7603 20/25 ver 0.5 b-type, 1/8 duty cycle, 1/4 bias com1 vdd v1 v2 (v3) v4 v5 1234 9 200 clocks 1 frame 1 ms 9 . 11 16 200 k 270 sec 1 frame = = hz 3 . 84 ms 9 . 11 1 frequency = = frame 5678 16 2 1 b-type, 1/11 duty cycle, 1/4 bias com1 vdd v1 v2 (v3) v4 v5 1234 9 200 clocks 1 frame 1 ms 3 . 16 22 200 k 270 sec 1 frame = = hz 4 . 61 3 16 1 fre q uenc y = = frame 5678 22 2 1 10 11 12 21 b-type, 1/16 duty cycle, 1/5 bias com1 vdd v1 v2 v4 v5 1234 100 clocks 1 frame 1 ms 9 . 11 32 100 k 270 sec 1 frame = = hz 3 . 84 9 11 1 fre q uenc y = = frame 5 32 2 1 15 16 17 31 14 13 v3
nt7603 21/25 ver 0.5 application circuit (for reference only) com1~16 seg1~80 lcd panel v5 db0~7 e, r/w, rs mpu vr gnd vdd nt7603
nt7603 22/25 ver 0.5 ordering information part no. cg rom package shipment style NT7603BDB-01 192 cgrom (ref p12) cog chip form bumped die on blue tape nt7603bdt-01 192 cgrom (ref p12) cog chip form bumped die on chip tray nt7603bdw-01 192 cgrom (ref p12) cog chip form bumped die on wafer
nt7603 23/25 ver 0.5 pad configuration of nt7603 unit: m m chip window: 1220 5010 m m 2 150 166 1 66 149 84 83 67 m n m n a1 a2 n m b2 c1 b3 c2 b4 r r c1 c2 m n a1 b3 b 1 b1 b1 l l l l b1 a1 230 c1 66 a2 5010 c2 511.55 b1 50 r 35 b2 1220 m 42 b3 70 n 90 b4 500.2 l 70 pad location no. pad name x y no. pad name x y 1 gnd -2275 -540 13 gnd -1435 -540 2 gnd -2205 -540 14 gnd -1365 -540 3 gnd -2135 -540 15 gnd -1295 -540 4 gnd -2065 -540 16 osc1 -1225 -540 5 gnd -1995 -540 17 osc2 -1155 -540 6 gnd -1925 -540 18 v1 -1085 -540 7 gnd -1855 -540 19 v2 -1015 -540 8 gnd -1785 -540 20 v3 -945 -540 9 gnd -1715 -540 21 v4 -875 -540 10 gnd -1645 -540 22 v5 -805 -540 11 gnd -1575 -540 23 v5 -735 -540 12 gnd -1505 -540 24 v5 -665 -540
nt7603 24/25 ver 0.5 no. pad name x y no. pad name x y 25 v5 -595 -540 74 com[14] 2439 -70 26 opt_r0 -525 -540 75 com[15] 2439 0 27 gnd -455 -540 76 com[16] 2439 70 28 opt_r1 -385 -540 77 seg[80] 2439 140 29 vdd -315 -540 78 seg[79] 2439 210 30 vdd -245 -540 79 seg[78] 2439 280 31 vdd -175 -540 80 seg[77] 2439 350 32 vdd -105 -540 81 seg[76] 2439 420 33 vdd -35 -540 82 seg[75] 2439 490 34 vdd 35 -540 83 seg[74] 2439 560 35 vdd 105 -540 84 seg[73] 2275 540 36 vdd 175 -540 85 seg[72] 2205 540 37 vdd 245 -540 86 seg[71] 2135 540 38 vdd 315 -540 87 seg[70] 2065 540 39 vdd 385 -540 88 seg[69] 1995 540 40 vdd 455 -540 89 seg[68] 1925 540 41 vdd 525 -540 90 seg[67] 1855 540 42 vdd 595 -540 91 seg[66] 1785 540 43 vdd 665 -540 92 seg[65] 1715 540 44 rs 735 -540 93 seg[64] 1645 540 45 rs 805 -540 94 seg[63] 1575 540 46 rw 875 -540 95 seg[62] 1505 540 47 rw 945 -540 96 seg[61] 1435 540 48 e 1015 -540 97 seg[60] 1365 540 49 e 1085 -540 98 seg[59] 1295 540 50 db[0] 1155 -540 99 seg[58] 1225 540 51 db[0] 1225 -540 100 seg[57] 1155 540 52 db[1] 1295 -540 101 seg[56] 1085 540 53 db[1] 1365 -540 102 seg[55] 1015 540 54 db[2] 1435 -540 103 seg[54] 945 540 55 db[2] 1505 -540 104 seg[53] 875 540 56 db[3] 1575 -540 105 seg[52] 805 540 57 db[3] 1645 -540 106 seg[51] 735 540 58 db[4] 1715 -540 107 seg[50] 665 540 59 db[4] 1785 -540 108 seg[49] 595 540 60 db[5] 1855 -540 109 seg[48] 525 540 61 db[5] 1925 -540 110 seg[47] 455 540 62 db[6] 1995 -540 111 seg[46] 385 540 63 db[6] 2065 -540 112 seg[45] 315 540 64 db[7] 2135 -540 113 seg[44] 245 540 65 db[7] 2205 -540 114 seg[43] 175 540 66 opt_lcd 2275 -540 115 seg[42] 105 540 67 gnd 2439 -560 116 seg[41] 35 540 68 testd 2439 -490 117 seg[40] -35 540 69 com[9] 2439 -420 118 seg[39] -105 540 70 com[10] 2439 -350 119 seg[38] -175 540 71 com[11] 2439 -280 120 seg[37] -245 540 72 com[12] 2439 -210 121 seg[36] -315 540 73 com[13] 2439 -140 122 seg[35] -385 540
nt7603 25/25 ver 0.5 no. pad name x y no. pad name x y 123 seg[34] -455 540 146 seg[11] -2065 540 124 seg[33] -525 540 147 seg[10] -2135 540 125 seg[32] -595 540 148 seg[9] -2205 540 126 seg[31] -665 540 149 seg[8] -2275 540 127 seg[30] -735 540 150 seg[7] -2439 560 128 seg[29] -805 540 151 seg[6] -2439 490 129 seg[28] -875 540 152 seg[5] -2439 420 130 seg[27] -945 540 153 seg[4] -2439 350 131 seg[26] -1015 540 154 seg[3] -2439 280 132 seg[25] -1085 540 155 seg[2] -2439 210 133 seg[24] -1155 540 156 seg[1] -2439 140 134 seg[23] -1225 540 157 com[8] -2439 70 135 seg[22] -1295 540 158 com[7] -2439 0 136 seg[21] -1365 540 159 com[6] -2439 -70 137 seg[20] -1435 540 160 com[5] -2439 -140 138 seg[19] -1505 540 161 com[4] -2439 -210 139 seg[18] -1575 540 162 com[3] -2439 -280 140 seg[17] -1645 540 163 com[2] -2439 -350 141 seg[16] -1715 540 164 com[1] -2439 -420 142 seg[15] -1785 540 165 test -2439 -490 143 seg[14] -1855 540 166 testm -2439 -560 144 seg[13] -1925 540 alk_l -1993.45 109.8 145 seg[12] -1995 540 alk_r 1993.45 109.8

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